Piton: A 25-core Academic Manycore Research Processor. The current version of the Piton chip measures 6 millimeters by 6 millimeters. The chip has more than 460 million transistors, each of which are as small as 32 nanometers — too small to be seen by anything but an electron microscope. The bulk of these transistors are contained in 25 cores. Most personal computer chips have four or eight cores. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

Cupertino, California, USA - August 23, 2016

by Adam Hadhazy
for the Office of Engineering Communications at Princeton University


Princeton University researchers have developed a new computer chip that promises to boost the performance of data centers that lie at the core of numerous online services such as email and social media.

http://parallel.princeton.edu/piton/#  

Photo courtesy of Princeton University

The chip — called "Piton" after the metal spikes driven by rock climbers into mountainsides to aid in their ascent — was presented August 23 at Hot Chips, a symposium on high-performance chips held in Cupertino, California.

http://www.hotchips.org/about/  

Princeton University researchers have developed a new computer chip called "Piton" (above) — after the metal spikes driven by rock climbers into mountainsides to aid in their ascent — that was designed specifically for massive computing systems. The chip could substantially increase processing speed while slashing energy usage, and is scalable, meaning that thousands of chips containing millions of independent processors can be connected into a single system. It was presented Aug. 23 at Hot Chips, a symposium on high-performance chips held in Cupertino, California. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

Data centers — essentially giant warehouses packed with computer servers — support cloud-based services such as Gmail and Facebook, as well as store the staggeringly voluminous content available via the internet.

Photo courtesy of Princeton University

Yet the computer chips at the heart of the biggest servers that route and process information often differ little from the chips in smaller servers or everyday personal computers.

Photo courtesy of Princeton University

The Princeton researchers designed their chip specifically for massive computing systems.

Piton could substantially increase processing speed while slashing energy usage.

Photo courtesy of Princeton University

The chip architecture is scalable — designs can be built that go from a dozen to several thousand cores, which are the independent processors that carry out the instructions in a computer program.

Also, the architecture enables thousands of chips to be connected into a single system containing millions of cores.

Piton: A 25-core Academic Manycore Research Processor. The current version of the Piton chip measures 6 millimeters by 6 millimeters. The chip has more than 460 million transistors, each of which are as small as 32 nanometers — too small to be seen by anything but an electron microscope. The bulk of these transistors are contained in 25 cores. Most personal computer chips have four or eight cores. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

"With Piton, we really sat down and rethought computer architecture in order to build a chip specifically for data centers and the cloud," said David Wentzlaff, a Princeton assistant professor of electrical engineering and associated faculty in the Department of Computer Science.
"The chip we've made is among the largest chips ever built in academia and it shows how servers could run far more efficiently and cheaply."

http://ee.princeton.edu/  

http://www.cs.princeton.edu/  

Piton: A 25-core Academic Manycore Research Processor. The current version of the Piton chip measures 6 millimeters by 6 millimeters. The chip has more than 460 million transistors, each of which are as small as 32 nanometers — too small to be seen by anything but an electron microscope. The bulk of these transistors are contained in 25 cores. Most personal computer chips have four or eight cores. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

The unveiling of Piton is a culmination of years of effort by Wentzlaff and his students.

Michael McKeown, Wentzlaff's graduate student, will present at Hot Chips.

Piton: A 25-core Academic Manycore Research Processor. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

Mohammad Shahrad, a graduate student in Wentzlaff's Princeton Parallel Group, said that creating "a physical piece of hardware in an academic setting is a rare and very special opportunity for computer architects."

http://parallel.princeton.edu/  

Piton: A 25-core Academic Manycore Research Processor. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

The current version of the Piton chip measures 6 millimeters by 6 millimeters.

The chip has more than 460 million transistors, each of which are as small as 32 nanometers — too small to be seen by anything but an electron microscope.
The bulk of these transistors are contained in 25 cores.

Most personal computer chips have four or eight cores.

Piton: A 25-core Academic Manycore Research Processor. Photo courtesy of Princeton University / David Wentzlaff, Department of Electrical Engineering

In general, more cores mean faster processing times, so long as software ably exploits the hardware's available cores to run operations in parallel.

Therefore, computer manufacturers have turned to multi-core chips to squeeze further gains out of conventional approaches to computer hardware.

Photo courtesy of Princeton University

“In recent years companies and academic institutions have produced chips with many dozens of cores — but the readily scalable architecture of Piton can enable thousands of cores on a single chip with half a billion cores in the data center,”  Wentzlaff said.

Photo courtesy of Princeton University

"What we have with Piton is really a prototype for future commercial server systems that could take advantage of a tremendous number of cores to speed up processing,"  Wentzlaff said.

Photo courtesy of Princeton University

The Piton chip's design focuses on exploiting commonality among programs running simultaneously on the same chip.

One method to do this is called execution drafting.
It works very much like the drafting in bicycle racing, when cyclists conserve energy by riding behind a lead rider who cuts through the air, creating a slipstream.

Photo courtesy of Princeton University

At a data center, multiple users often run programs that rely on similar operations at the processor level.

The Piton chip's cores can recognize these instances and execute identical instructions consecutively, so that they flow one after another, like a line of drafting cyclists.

Photo courtesy of Princeton University

Doing so can increase energy efficiency by about 20 percent compared to a standard core, the researchers said.

A second innovation incorporated into the Piton chip parcels out when competing programs access computer memory that exists off of the chip.

Photo courtesy of Princeton University

Called a memory-traffic shaper, this function acts like a traffic cop at a busy intersection, considering each program's needs and adjusting memory requests and waving them through appropriately so they do not clog the system.
This approach can yield an 18 percent increase in performance compared to conventional means of allocation.

Photo courtesy of Princeton University

The Piton chip also gains efficiency by its management of memory stored on the chip itself.
This memory, known as the cache memory, is the fastest in the computer and used for frequently accessed information.

Photo courtesy of Princeton University

In most designs, cache memory is shared across all of the chip's cores.
But that strategy can backfire when multiple cores access and modify the cache memory.

Piton sidesteps this problem by assigning areas of the cache and specific cores to dedicated applications.

Photo courtesy of Princeton University

The researchers say the system can increase efficiency by 29 percent per chip.
The researchers estimate that this savings would multiply as the system is deployed across millions of cores in a data center.

Members of the research team said these improvements could be implemented while keeping costs in line with current manufacturing standards.

To hasten further developments leveraging and extending the Piton architecture, the Princeton researchers have made its design open source and thus available to the public and fellow researchers.

http://parallel.princeton.edu/openpiton/  

Photo courtesy of Princeton University

"We're very pleased with all that we've achieved with Piton in an academic setting, where there are far fewer resources than at large, commercial chipmakers,"  Wentzlaff said.
"We're also happy to give out our design to the world as open source, which has long been commonplace for software, but is almost never done for hardware."

Photo courtesy of Princeton University

Piton was designed by the Princeton team and manufactured by IBM.

Primary funding for the project has come from the National Science Foundation, the Defense Advanced Research Projects Agency and the Air Force Office of Scientific Research.

Other Princeton researchers involved in the project since its 2013 inception are: Yaosheng Fu, Tri Nguyen, Yanqi Zhou, Jonathan Balkind and Alexey Lavrov, all graduate students in the Princeton Parallel Group; Princeton alumni Matthew Matl '16, Xiaohua Liang '16 and Samuel Payne '14.


David Wentzlaff

Assistant Professor of Electrical Engineering

• Ph.D., Massachusetts Institute of Technology, 2012

• M.S., Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 2002

• B.S., Electrical Engineering, University of Illinois at Urbana-Champaign, 2000

My research group has two main thrusts.
First, my group focuses on the design of future computing architectures and software systems for data centers and cloud computers.
Second, my research group investigates the broad area of green computing including how to minimize the impact of computing systems on the environment and how to design computer systems to be serviced and ultimately decommissioned in a sustainable manner.

David Wentzlaff Photo courtesy of Princeton University

The ever shrinking transistor and continuation of Moore’s Law has afforded the computer architect a wealth of transistor resources.
Using these transistors to increase the performance of single processor systems is now at the point of diminishing returns.
As humanity still desires higher performance computers, my research group and industry has turned to allocating additional transistors for parallel computing resources (more processor cores).

A separate, but equally important trend is the growth of cloud computing systems, which has been fueled by the economies of scale derived from centrally managing computers.
The ability for a user to leverage computing in an on-demand fashion and treat computation as a true commoditized utility enables new classes of computation and opens the door for the average programmer to solve problems unthinkable without the ability to easily harness huge amounts of computation.

We are investigating the intersection of manycore computers and cloud systems.

Many challenging problems need to be solved in order to build the cloud computer of twenty years in the future.

My group is investigating how to build the chips, interconnect, system design, heating, cooling, power distribution, and software to fuel the 5000 core chip integrated into a million core data center of the future.

The environment is one of humanities most important resources. It sustains life and without a suitable environment, humanity may cease to exist.
Unfortunately, advances in computing systems have largely come at the expense of the environment.

The never ending computer upgrade cycle has created large amounts of e-waste.
In my research group, we are investigating how to create computing systems which are sustainable across the entire life-cycle of the system.
This work not only aims to reduce the power and environmental operational impact of computer systems, but also the impact of computing systems after they have become obsolete.

We are focusing on how to design computing systems such that they can be recycled easier, they can be serviced and upgraded easier to increase their usable lifetime, and how to design computer chips and systems such that they can be dismantled in the most environmentally friendly manner.

Phone: 609-258-7781

Email: wentzlaf@princeton.edu  


Source: Princeton University

http://www.princeton.edu/main/  



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